In commonly owned U.S. Patent application Ser. No. 684,012, filed May 7, 1976 by Francesco Fenoglio, there has been disclosed an expandable memory to be used at a junction of several incoming lines carrying respective bit streams of the same cadence, the bits of each incoming stream being organized in a recurrent lower-order frame; these frames are then interleaved, bit by bit, in a composite outgoing stream to form a recurrent higher-order frame to be transmitted over a PCM link to a remote terminal where the bits are redistributed into replicas of the original bit streams. The expandable memory described and claimed in that copending application operates by introducing so-called stuffing bits into the higher-order frame, some of the stuffing bits being replaced from time to time by message bits in order to maintain the necessary correlation between the incoming and outgoing bit streams.